The present invention relates to a semiconductor storage device and portable electronic equipment. The invention relates, more specifically, to a semiconductor storage device that has a memory cell array in which nonvolatile memory elements constructed of field-effect transistors including memory function bodies having a function to retain electric charge or polarization are arranged and to portable electronic equipment including such a semiconductor storage device.
Conventionally, a flash memory has typically been used as a nonvolatile semiconductor storage device.
In this flash memory, as shown in FIG. 34, a floating gate 902, an insulation film 907 and a word line (control gate) 903 are formed in this order via a gate insulation film 908 on a semiconductor substrate 901, and a source line 904 and a bit line 905 are formed on both sides of the floating gate 902, constituting a memory cell. Around this memory cell are formed element isolation regions 906 (refer to Japanese Patent Laid-Open Publication No. HEI 5-304277).
The memory cell retains storage as the quantity of charge in the floating gate 902. In the memory cell array constructed by arranging the memory cells, the desired memory cell can be subjected to rewrite and read operations by selecting the specified word line and bit line and applying a predetermined voltage to the lines.
The flash memory as described above exhibits a drain current Id to gate voltage Vg characteristic indicated by the solid line curve and the dashed line curve in FIG. 35 when the quantity of charges in the floating gate 902 changes. That is, if the quantity of negative charges in the floating gate 902 is increased, then the characteristic curve changes from the characteristic indicated by the solid line curve to the characteristic indicated by the broken line curve in FIG. 41, and the Id-Vg curve is displaced roughly parallel in a direction in which the gate voltage Vg increases with respect to same drain current Id, and the threshold voltage increases.
However, the flash memory as described above has been functionally required to arrange the insulation film 907 that isolates the floating gate 902 from the word line 903 and had difficulties in reducing the thickness of the gate insulation film 908 to prevent the leak of charges from the floating gate 902. Thus, the need for the insulator 907 and the gate insulator 908 each having a specified thickness would be an obstacle to miniaturization of memory cells.